EVEagle VisionTekDiscuss Collaboration
IMAGING IP INNOVATOR · CMOS IMAGE SENSOR

Preserve resolution.
Reduce readout frequency.

A patented CIS architecture designed to divide a high-resolution Bayer sensor into multiple synchronized image arrays—enabling parallel lower-frequency readout while preserving high-resolution pixel information.

Explore the architectureTechnology discussion
2013Established
13Patents filed
10Patents granted
US · TW · CNPatent coverage
A1A2A3A4
HIGH-RESOLUTION
CIS ARCHITECTURE

Lower frequency is not the only value.

Preserving high resolution is the key differentiator.

01 · TECHNOLOGY

A different path to high-resolution CIS readout

Conventional high-pixel-count designs face increasing readout frequency, power and noise challenges. Eagle VisionTek's patented approach partitions the sensor into multiple symmetric arrays and reads them in parallel.

01

Parallel low-frequency readout

Divide the Bayer pixel array into multiple image arrays. Each array performs synchronized exposure and readout, reducing the operating frequency required per path.

02

Rolling-shutter synchronization

Adjacent image arrays scan in opposite directions to align the rolling-shutter timing difference at array boundaries.

03

Digital reconstruction

Low-frequency ADC outputs are written into a frame buffer, reordered, and read out as a sequential high-resolution digital image stream.

ARCHITECTURE CONCEPT

Multiple analog paths. One reconstructed high-resolution output.

A1 · Bayer Array
A2 · Bayer Array
A3 · Bayer Array
A4 · Bayer Array
→LOW-FREQUENCY
Column ADC 1
Column ADC 2
Column ADC 3
Column ADC 4
→
FRAME BUFFERReorder + Read Controller
→ MIPI
02 · DIFFERENTIATION

Designed to decouple frequency reduction from resolution loss

Pixel-combining approaches can reduce readout demands by grouping neighboring pixels. Our architecture pursues lower-frequency parallel readout while retaining native high-resolution Bayer pixel information.

Same sensor area · different spatial samplingConceptual comparison of CFA sampling density and readout strategy
Conceptual comparison showing increasing pixel combining and reduced effective spatial resolution, contrasted with EVT parallel low-frequency native Bayer readout
Conceptual visualization — more pixel combining reduces effective spatial sampling; EVT targets lower-frequency readout while retaining high-resolution Bayer information.
PIXEL COMBINING

Lower readout demand

Grouped color sampling
Fewer independent color-sampling sitesLower-frequency / higher-sensitivity modes

Neighboring same-color pixels are grouped for readout modes that trade spatial sampling for sensitivity and throughput.

VS
EAGLE VISIONTEK

Lower-frequency paths + high-resolution information

Native Bayer sampling
Higher spatial sampling retainedParallel low-frequency readout paths

Multiple sub-arrays operate in parallel, preserving Bayer pixel information for high-resolution reconstruction.

03 · SYSTEM VALUE

Unlock more of the camera system's optical resolution

As smartphone lens designs continue to advance, overall image detail depends on the resolution match between optics and the image sensor. A CIS architecture that preserves higher native spatial information can help the camera system make better use of high-resolution optics.

HIGH-RESOLUTION OPTICS→NATIVE BAYER SAMPLING→HIGH-DETAIL IMAGE
04 · INTELLECTUAL PROPERTY

Protected across key markets

Our high-resolution imaging architecture is supported by granted patents in the United States, Taiwan and China.

USUnited States Patent

US 11,290,672 B2

TWTaiwan Patent

I701948

CNChina Patent

ZL 2019 1 0909911.9

06 · COMPANY AT A GLANCE

Our evolution in imaging innovation

Selected visuals from Eagle VisionTek’s company profile highlight our CIS origins, strategic shift to imaging IP, and global patent portfolio.

Eagle VisionTek company profile infographic
Established in 2013 · Early focus on surveillance CMOS Image Sensors
Eagle VisionTek CIS technology and IP development timeline
From CIS development to high-value imaging IP innovation
Eagle VisionTek high-resolution imaging patent application infographic
High-resolution imaging IP for next-generation smartphone camera systems
06 · COMPANY

From CIS development to imaging IP innovation

Eagle VisionTek Co., Ltd. (Hong Kong) was established in 2013 and initially focused on CMOS Image Sensor development for surveillance applications.

In 2016, the company strategically shifted toward imaging-related intellectual property and CIS design application patents, building a portfolio focused on next-generation imaging architectures.

2013Company established
Surveillance CIS development
2016Strategic transformation
Imaging IP & CIS patents
2017—Now13 patents filed
10 patents granted
CO-DEVELOPMENT · IP LICENSING · TECHNICAL EVALUATION

Building the next generation of high-resolution imaging.

We welcome discussions with world-class CIS, camera module and mobile imaging companies on technical evaluation, co-development and intellectual-property licensing.

Start a conversation
06 · CONTACT

Let's discuss what high-resolution CIS can become.

Kevin Chung

CEO · Eagle VisionTek

[email protected]+886 939 745 319

Taiwan Branch Office
8F.-6, No. 81, Chengdu Rd., Wanhua Dist., Taipei City, Taiwan

Hong Kong Registered Office
Unit 304, Dominion Centre, 43 Queen’s Road East, Wanchai, Hong Kong